Realization-independent Testing of Sequential Circuits. Experimental Results

In this paper we analyze the situation when the tests are generated for a particular implementation. In this case there rises a question – can a test generated for one implementation be used for another implementation? Naturally, that a test generated according to one structure may not detect all specified faults of another structure. In this work we explore the test quality of one realization for detecting faults of other realizations. We analyze only such implementations that are generated by the same synthesis tool according to the same description, changing only the target library used during the synthesis. We have performed various experiments with sequential benchmark circuits. Our experiments show that the fault coverage surprisingly coincides. We think that there are two possible explanations of the outcome of the experiments. Firstly, the test redundancy is very high., Secondly, the combinational parts of all analyzed sequential circuits have simple logic and, therefore, the test sequences generated for particular realization are equally good for other realizations as well.